• DocumentCode
    1451582
  • Title

    Synthesizing fast, online-testable control units

  • Author

    Hellebrand, S. ; Wunderlich, H.-J. ; Hertwig, A.

  • Author_Institution
    Div. of Comput. Archit., Stuttgart Univ.
  • Volume
    15
  • Issue
    4
  • fYear
    1998
  • Firstpage
    36
  • Lastpage
    41
  • Abstract
    The authors present the self-checking bypass pipeline, an online-testable controller structure for data-dominated applications. For most circuits in a standard benchmark set, this structure leads to a performance improvement of more than 30% with an area overhead less than 15% that of conventional online-testable finite-state machines
  • Keywords
    error detection; finite state machines; logic testing; area overhead; benchmark set; data-dominated applications; finite-state machines; online-testable control units; online-testable controller structure; performance improvement; self-checking bypass pipeline; Circuit synthesis; Circuit testing; Clocks; Communication system control; Encoding; Error correction; Error correction codes; Fault detection; Logic; Pipelines;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.735925
  • Filename
    735925
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1451582