DocumentCode
1451909
Title
Modeling circuit parasitics. IV
Author
Wadell, Brian C.
Volume
1
Issue
4
fYear
1998
fDate
12/1/1998 12:00:00 AM
Firstpage
36
Lastpage
38
Abstract
In the previous parts, the author introduced zero-length models for circuit parasitics (i.e., lumped elements), and showed how one can estimate resistive, capacitive, and inductive parasitics in circuits. In this final installment, he looks at parasitics with electrical length-transmission lines
Keywords
electric distortion; lumped parameter networks; modelling; network analysis; transmission line theory; circuit parasitics; digital clock; lumped elements; stray circuit elements; transmission lines; Circuit theory; Clocks; Dielectrics; Frequency; Maxwell equations; Permittivity; Stripline; Switches; Transmission line theory; Transmission lines;
fLanguage
English
Journal_Title
Instrumentation & Measurement Magazine, IEEE
Publisher
ieee
ISSN
1094-6969
Type
jour
DOI
10.1109/5289.735976
Filename
735976
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