DocumentCode
1452932
Title
On-line fault detection for bus-based field programmable gate arrays
Author
Shnidman, Nathan R. ; Mangione-Smith, William H. ; Potkonjak, Miodrag
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
Volume
6
Issue
4
fYear
1998
Firstpage
656
Lastpage
666
Abstract
We introduce a technique for on-line built-in self-testing (BIST) of bus-based field programmable gate arrays (FPGAs). This system detects deviations from the intended functionality of an FPGA without using special-purpose hardware, hardware external to the device, and without interrupting system operation. Such a system would be useful for mission-critical applications with resource constraints. The system solves these problems through an on-line fault scanning methodology. A device´s internal resources are configured to test for faults. Testing scans across an FPGA, checking a section at a time. Simulation on a model FPGA supports the viability and effectiveness of such a system.
Keywords
built-in self test; circuit simulation; fault diagnosis; field programmable gate arrays; logic simulation; bus-based field programmable gate arrays; logic simulation; mission-critical applications; on-line built-in self-testing; on-line fault scanning methodology; resource constraints; Built-in self-test; Fault detection; Field programmable gate arrays; Hardware; Logic devices; Manufacturing; Mission critical systems; Monitoring; Programmable logic arrays; System testing;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/92.736139
Filename
736139
Link To Document