Dynamic current mode logic (DyCML): a new low-power high-performance logic style

Author

Allam, Mohamed W. ; Elmasry, Mohamed I.

Author_Institution

Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada

Volume

36

Issue

3

fYear

2001

fDate

3/1/2001 12:00:00 AM

Firstpage

550

Lastpage

558

Abstract

This paper introduces a new reduced swing logic style called dynamic current mode logic (DyCML) that reduces both gate and interconnect power dissipation. DyCML circuits combine the advantages of MOS current mode logic (MCML) circuits with those of dynamic logic families to achieve high performance at a low-supply voltage with low-power dissipation. Unlike CML circuits, DyCML gates do not have a static current source, which makes DyCML a good candidate for portable devices and battery-powered systems. Simulation and test results show that DyCML circuits are superior to other logic styles in terms of power and delay. A 16-bit DyCML carry look-ahead adder (CLA), fabricated in 0.6-μm CMOS technology, attains a delay of 1.24 ns and dissipates 19.2 mW at 400 MHz

Keywords

CMOS logic circuits; adders; current-mode logic; low-power electronics; 0.6 micron; 1.24 ns; 16 bit; 19.2 mW; 400 MHz; CMOS technology; MOS current mode logic; carry look-ahead adder; delay; dynamic current mode logic; low-power design; power dissipation; CMOS technology; Circuit simulation; Circuit testing; Delay; Integrated circuit interconnections; Logic circuits; Logic devices; Logic testing; Power dissipation; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.910495

Filename

910495