TCAD-assisted analysis of back-channel leakage in irradiated mesa SOI nMOSFETs

Author

Milanowski, R.J. ; Pagey, M.P. ; Massengill, L.W. ; Schrimpf, R.D. ; Wood, M.E. ; Offord, B.W. ; Graves, R.J. ; Galloway, K.F. ; Nicklaw, C.J. ; Kelley, E.P.

Author_Institution

Vanderbilt Univ., Nashville, TN, USA

Volume

45

Issue

6

fYear

1998

fDate

12/1/1998 12:00:00 AM

Firstpage

2593

Lastpage

2599

Abstract

Enhanced back-channel leakage in a mesa SOI device architecture is analyzed. Using integrated process, device, and hole trapping simulation, the cause of the leakage enhancement is identified as enhanced hole trapping in the buried oxide near the island edge. Simulation results suggest this edge effect may be mitigated using body-tied-to-source tabs at the edge of the island. The potential performance and manufacturing impacts of this measure are discussed

Keywords

MOSFET; buried layers; electronic engineering computing; hole traps; leakage currents; radiation hardening (electronics); semiconductor device models; silicon-on-insulator; technology CAD (electronics); NMOSFET; Si; TCAD-assisted analysis; back-channel leakage; body-tied-to-source tabs; buried oxide; edge effect; hole trapping simulation; integrated process/device simulation; irradiated mesa SOI n-MOSFETs; leakage enhancement; n-channel MOSFET; Data systems; Etching; Geometry; Isolation technology; Leakage current; MOSFETs; Manufacturing; Semiconductor device manufacture; Silicon; Threshold voltage;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.736502

Filename

736502