A low-voltage line driver for digital signaling interface

Author

Lakshmikumar, K.R. ; Anidjar, J.

Author_Institution

Lucent Technol., AT&T Bell Labs., Murray Hill, NJ, USA

Volume

34

Issue

1

fYear

1999

fDate

1/1/1999 12:00:00 AM

Firstpage

111

Lastpage

115

Abstract

This paper describes a CMOS line driver that operates from a 3 V power supply and delivers a peak current of about 100 mA to the load. The novel features of the circuit are high power efficiency, an output pulse shape and amplitude independent of power supply and temperature variations, and the ability to handle abnormal load termination conditions. The circuit has been designed in a 0.9 μm CMOS technology and does not require any low-threshold devices

Keywords

CMOS integrated circuits; bridge circuits; data communication equipment; digital communication; driver circuits; low-power electronics; mixed analogue-digital integrated circuits; power amplifiers; transceivers; twisted pair cables; 0.9 micron; 3 V; CMOS line driver; LV line driver; abnormal load termination conditions; bridge amplifier; digital signaling interface transceiver; low-voltage line driver; push-pull amplifier; submicron CMOS technology; twisted pair line; Analog circuits; CMOS technology; Circuit topology; Driver circuits; Power dissipation; Power supplies; Pulse amplifiers; Pulse transformers; Pulsed power supplies; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.736664

Filename

736664