Title :
A Dedicated Monitoring Infrastructure for Multicore Processors
Author :
Zhao, Jia ; Madduri, Sailaja ; Vadlamani, Ramakrishna ; Burleson, Wayne ; Tessier, Russell
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA
fDate :
6/1/2011 12:00:00 AM
Abstract :
On-chip monitoring of environmental information, such as temperature, voltage, and error data, is becoming increasingly important. To address this need, a low-overhead architectural approach to monitor data collection and use in multicore systems is described. A key aspect of our standalone monitoring subsystem is a low-complexity, on-chip network designed to transport monitor data with multiple priority levels. Collected monitor information is evaluated by a dedicated processor. Experimental results using architectural and interconnect simulators show that the new low-overhead subsystem facilitates employment of thermal and delay-aware dynamic voltage and frequency scaling. In contrast to using existing on-chip interconnect resources to communicate monitor data, the new subsystem provides necessary bandwidth for monitor data traffic without impacting application data traffic. Synthesis results show that our dedicated monitoring approach consumes about 0.2% of multicore area and power resources for an 8-core system based on AMD Athlon 64 processor cores.
Keywords :
integrated circuit interconnections; microprocessor chips; monitoring; multiprocessing systems; network-on-chip; AMD Athlon processor core; dedicated monitoring infrastructure; environmental information; multicore processor; network-on-chip; on chip interconnect; on chip monitoring; transport monitor data; Delay; Dynamic voltage scaling; Employment; Frequency; Monitoring; Multicore processing; Network-on-a-chip; Power system interconnection; Temperature; Traffic control; Multicore; network on chip (NoC); on-chip monitoring;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2010.2043964