Measurement-Based Ring Oscillator Variation Analysis

Author

Johguchi, Koh ; Kaya, Akihiro ; Mattausch, Hans Jürgen ; Koide, Tetsushi ; Izumi, Shinya ; Sadachika, Norio

Author_Institution

Hiroshima Univ., Hiroshima, Japan

Volume

27

Issue

5

fYear

2010

Firstpage

6

Lastpage

13

Abstract

As transistor size scales down, unavoidable process variations are rapidly increasing. Consequently, it´s essential for designers to accurately estimate within-die and interdie variations so that circuits and integrated systems can operate correctly. This article describes an analysis of ring oscillators that were designed in 180-nm and 100-nm CMOS technologies, and discusses the oscillators´ frequency variations as determined for different stage numbers and supply voltages.

Keywords

CMOS integrated circuits; integrated circuit measurement; oscillators; CMOS technology; interdie variations; ring oscillator variation analysis; size 100 nm; size 180 nm; transistor size; within-die variations; CMOS technology; Design methodology; Frequency; Integrated circuit measurements; Integrated circuit technology; MOSFET circuits; Ring oscillators; Very large scale integration; Voltage; Voltage-controlled oscillators; CMOS; compact model; design and test; low power; ring oscillators; surface potential; within-die variation; within-wafer variation;

fLanguage

English

Journal_Title

Design & Test of Computers, IEEE

Publisher

ieee

ISSN

0740-7475

Type

jour

DOI

10.1109/MDT.2010.57

Filename

5440144