DocumentCode
1458645
Title
Internally biased transistor simulation model
Author
Floberg, H. ; Bjork, C.
Author_Institution
Ericsson Mobile Commun. AB, Lund, Sweden
Volume
37
Issue
5
fYear
2001
fDate
3/1/2001 12:00:00 AM
Firstpage
275
Lastpage
276
Abstract
An augmented transistor model where a three-terminal device is atomically biased internally is presented. A duplicate of the signal transistor is used to solve the bias equation. This model makes it convenient to compare circuit topologies by simulation
Keywords
semiconductor device models; transistors; circuit topology; internal bias; signal transistor; simulation model; three-terminal device;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20010189
Filename
911948
Link To Document