DocumentCode
146067
Title
Variability in device degradations: Statistical observation of NBTI for 3996 transistors
Author
Awano, Hiromitsu ; Hiromoto, Masayuki ; Sato, Takao
Author_Institution
Dept. of Commun. & Comput. Eng., Kyoto Univ., Kyoto, Japan
fYear
2014
fDate
22-26 Sept. 2014
Firstpage
218
Lastpage
221
Abstract
Degradations of thousands of transistors have been observed in a practical time. A novel device array circuit suitable for measurement-based statistical characterization has been devised to facilitate parallel stress bias application to capture negative bias temperature instability (NBTI). The experimental results show that log-normal distributions approximate the distribution of power-law exponents very well and that the variation in magnitude of threshold voltage shifts bears an inverse relation to the channel areas of transistors. The variability in degradations under an AC-stress condition is also presented for the first time.
Keywords
MOSFET; log normal distribution; negative bias temperature instability; semiconductor device reliability; semiconductor device testing; stress effects; AC stress condition; NBTI; device array circuit; device degradation variability; log normal distribution; measurement based statistical characterization; negative bias temperature instability; parallel stress bias application; power law exponent distribution; statistical observation; threshold voltage shift; Current measurement; Leakage currents; Stress; Stress measurement; Threshold voltage; Transistors; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference (ESSDERC), 2014 44th European
Conference_Location
Venice
ISSN
1930-8876
Print_ISBN
978-1-4799-4378-4
Type
conf
DOI
10.1109/ESSDERC.2014.6948799
Filename
6948799
Link To Document