• DocumentCode
    1460947
  • Title

    Software-based self-testing methodology for processor cores

  • Author

    Chen, Li ; Dey, Sujit

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
  • Volume
    20
  • Issue
    3
  • fYear
    2001
  • fDate
    3/1/2001 12:00:00 AM
  • Firstpage
    369
  • Lastpage
    380
  • Abstract
    At-speed testing of gigahertz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost high-quality self-test methodologies that can be used by processors to test themselves at-speed. Currently, built-in self-test (BIST) is the primary self-test methodology available. While memory BIST is commonly used for testing embedded memory cores, complex logic designs such as microprocessors are rarely tested with logic BIST. In this paper, we first analyze the issues associated with current hardware-based logic-BIST methodologies by applying a commercial logic-BIST tool to two processor cores. We then propose a new software-based self-testing methodology for processors, which uses a software tester embedded in the processor memory as a vehicle for applying structural tests. The software tester consists of programs for test generation and test application. Prior to the test, structural tests are prepared for processor components in the form of self-test signatures. During the process of self-test, the test generation program expands the self-test signatures into test sets and the test application program applies the tests to the components under test at the speed of the processor. Application of the novel software-based self-test method demonstrates its significant cost/fault coverage benefits and its ability to apply at-speed test while alleviating the need for high-speed testers
  • Keywords
    built-in self test; fault diagnosis; instruction sets; logic testing; microprocessor chips; BIST; at-speed test; at-speed testing; complex logic designs; cost/fault coverage benefits; gigahertz processors; logic-BIST tool; processor cores; self-test methodologies; self-test signatures; software-based self-testing methodology; structural tests; test application; test generation; Application software; Automatic testing; Built-in self-test; Costs; Embedded software; Logic design; Logic testing; Microprocessors; Software testing; Vehicles;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.913755
  • Filename
    913755