DocumentCode :
146187
Title :
T3A: Design and managements of multiprocessor systems-on-chips
Author :
Ogras, Umit Y.
Author_Institution :
Sch. of Electr., Comput. & Energy Eng., Arizona State Univ., Tempe, AZ, USA
fYear :
2014
fDate :
2-5 Sept. 2014
Abstract :
Summary form only given. Continuous advances in VLSI technology enable implementation of complex systems ranging from single chip cloud computers to application specific heterogeneous multiprocessor systems-on-chip. Regardless of the application domain, design and implementation of these systems require multidimensional problem solving. Traditional metrics such as thermal design power, processor speed and chip area are not adequate to describe or differentiate modern computing systems. Instead, energy efficiency and performance under specific use cases, or key performance indicators, constitute an array of metrics. Similarly, dynamic power management techniques ensure energy efficiency under workload and parameter variations. This talk will present novel design and management methodologies for VLSI systems. This talk will present a unified methodology for the design and management of state of the art VLSI systems using examples from both high performance CMP and MpSoC domains. More specifically, the first part will focus on a multidimensional optimization methodology which relies on novel analytical power, performance and area models. The second part of the talk will cover variation-adaptive dynamic power management techniques based on feedback control theory.
Keywords :
VLSI; energy conservation; feedback; integrated circuit design; multiprocessing systems; power aware computing; system-on-chip; MpSoC domain; T3A design; VLSI systems; VLSI technology; application domain; application specific heterogeneous multiprocessor systems-on-chip; chip area; complex systems; energy efficiency; feedback control theory; high performance CMP domain; modern computing systems; multidimensional optimization methodology; multidimensional problem solving; parameter variations; performance indicators; processor speed; single chip cloud computers; thermal design power; variation-adaptive dynamic power management technique; workload variations; Awards activities; Computational modeling; Computers; Educational institutions; Laboratories;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System-on-Chip Conference (SOCC), 2014 27th IEEE International
Conference_Location :
Las Vegas, NV
Type :
conf
DOI :
10.1109/SOCC.2014.6948885
Filename :
6948885
Link To Document :
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