Temperature-Dependent Modeling and Characterization of Through-Silicon Via Capacitance

Author

Katti, Guruprasad ; Stucchi, Michele ; Velenis, Dimitrios ; Sorée, Bart ; De Meyer, Kristin ; Dehaene, Wim

Author_Institution

IMEC, Leuven, Belgium

Volume

32

Issue

4

fYear

2011

fDate

4/1/2011 12:00:00 AM

Firstpage

563

Lastpage

565

Abstract

A semianalytical model of the through-silicon via (TSV) capacitance for elevated operating temperatures is derived and verified with electrical measurements. The effect of temperature on the increase in TSV capacitance over different technology parameters is explored, and it is shown that higher oxide thickness reduces the impact of temperature rise on TSV capacitance, while with low doped substrates, which are instrumental for reducing the TSV capacitance, the sensitivity of TSV capacitance to temperature is large and cannot be ignored.

Keywords

three-dimensional integrated circuits; electrical measurements; elevated operating temperatures; low doped substrates; temperature-dependent modeling; three-dimensional integrated circuits; through-silicon via capacitance; Capacitance; Charge carrier processes; Integrated circuit modeling; Silicon; Substrates; Temperature measurement; Through-silicon vias; TSV capacitance; Temperature; three-dimensional integrated circuits (3-D ICs); through-silicon via (TSV);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2011.2109052

Filename

5722016