DocumentCode :
1462421
Title :
Defect Gallery and Bump Defect Reduction in the Self-Aligned Double Patterning Module
Author :
Cai, Cathy ; Padhi, Deenesh ; Seamons, Martin ; Bencher, Chris ; Ngai, Chris ; Kim, Bok Heon
Author_Institution :
Appl. Mater., Inc., Santa Clara, CA, USA
Volume :
24
Issue :
2
fYear :
2011
fDate :
5/1/2011 12:00:00 AM
Firstpage :
145
Lastpage :
150
Abstract :
The self-aligned double patterning (SADP) module is a scheme to form 32 nm or 22 nm line structures that extend the useful range of either dry scanner or immersion scanner photolithography tools. Once reliable baseline processes for SADP flow have been developed, defect data collection, understanding, characterization, and reduction become increasingly important. Knowledge on defect characterization and reduction thus obtained reduces tool ramp-up time at manufacturing sites and provides new directions to improve wafer fabrication processes. In this paper, the types of defects in each step of the process to ultimately form 32 nm or 22 nm structures using the SADP flow are discussed, including an in-depth study of the impact of bump defects on the SADP flow, and proposed mechanisms of bump defect formation. Potential solutions involving an improved film deposition process for the SADP process module are also presented.
Keywords :
immersion lithography; optical scanners; photolithography; SADP process module; bump defect reduction; defect data collection; defect gallery; dry scanner; film deposition process; immersion scanner photolithography tools; line structures; self-aligned double patterning module; size 22 nm; size 32 nm; wafer fabrication processes; Adders; Dielectrics; Etching; Inspection; Optical films; Bumps reduction; defect gallery; self-aligned double patterning (SADP);
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/TSM.2011.2121096
Filename :
5722044
Link To Document :
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