Very fast co-simulation model and accurate on-the-fly performance estimation methodology for heterogeneous MPSoC

For helping MPSoC designers to make right choices at the first development steps, we present here a Hw/Sw high-level heterogeneous SoC simulation model in order to facilitate the exploration while ensuring the functional correctness. Because the system level offers a large optimization capacity, we particularly aim on operating system (OS) services and tasks mapping. Also, we propose to estimate dynamically the execution times of the mapping tasks at the C level allowing a very fast co-simulation.