DocumentCode
1462608
Title
Editorial
Author
Trybula, Walter J.
Author_Institution
SEMATECH Austin, TX 78741 USA
Volume
21
Issue
4
fYear
1998
Firstpage
245
Lastpage
245
Abstract
Electrostatic discharge (ESD) testing results of aluminum (Al) and copper (Cu) interconnect wires and vias for advanced semiconductor technologies demonstrate that interconnects will be a limiting failure mechanism in the future for ESD robustness of semiconductor chips. Comparison of Cu and Al interconnect and vias ESD robustness and failure mechanisms will be shown. Results demonstrate an improvement in the ESD robustness of a Cu-based interconnect system, compared to Al-based interconnects, with an improvement in the critical current density, J/sub crit/, in the human body and machine model time regimes.
Keywords
aluminium; copper; current density; electrostatic discharge; failure analysis; integrated circuit interconnections; integrated circuit reliability; Al; Cu; ESD robustness; advanced semiconductor technology interconnects; critical current density; human body model; interconnect wires; limiting failure mechanism; machine model; technology scaling; time regimes; vias; Aluminum; Biological system modeling; Copper; Critical current density; Electrostatic discharge; Failure analysis; Humans; Robustness; Semiconductor device testing; Wires;
fLanguage
English
Journal_Title
Components, Packaging, and Manufacturing Technology, Part C, IEEE Transactions on
Publisher
ieee
ISSN
1083-4400
Type
jour
DOI
10.1109/3476.739171
Filename
739171
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