A reconfigurable 0-L1-L2 S-MASH2 modulator with high-level sizing and power estimation

This paper presents a cascade sigma-delta modulator that uses concepts of 0-L MASH and Sturdy MASH sigma-delta modulator architectures to implement the higher-order multi-loop 0-L₁-L₂ S-MASH² architecture. The combination of the above two architectures results in achieving larger input-signal levels and eliminates the use of digital-filters, thus removing high gain amplifiers. The presented architecture is made reconfigurable with variable loop-filter order, number of quantizer bits, OSR and inter-stage gains to demonstrate its usage in different standards like GSM, UMTS, WiMAX and WLAN for next generation software defined radios. A high level power estimation is carried out for the presented reconfigurable sigma-delta modulator. Time-domain behavioral simulations are shown to validate the benefits of the proposed modulator design.