Title :
Performance of PLL synthesiser based on DDS feedback
Author :
Brennan, Paul V. ; Walkington, R.
Author_Institution :
Dept. of Electron. & Electr. Eng., Univ. Coll. London
fDate :
11/12/1998 12:00:00 AM
Abstract :
An unusual phase-locked synthesiser architecture is described which is capable of agile operation with very good frequency resolution. Analyses are presented to show the fundamental limits of operation in terms of resolution, discrete spurii and phase noise floor
Keywords :
circuit feedback; direct digital synthesis; phase locked loops; DDS feedback; PLL synthesiser; discrete spurii; frequency agility; frequency resolution; phase noise; phase-locked loop;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19981512
