Frequency-Domain Analysis of Effects of a Diverged Interconnect Design Involved in High-Speed Front-End Electronics

Front-end electronics (FEEs) with a trigger function typically involve a diverged interconnect, which transfers signals from an amplifier block to both a magnitude acquisition block and a timing acquisition block. The FEE suffers from inherent reflection due to the impedance mismatch at the diverged interconnect, particularly in high-speed applications. In this paper, the effects of the diverged interconnect in the FEE are analyzed in the frequency domain. A transfer function of the FEE is derived, and the frequency responses are estimated under diverse characteristic impedance and termination conditions of the diverged interconnect. The estimated results are confirmed by performing experiments with test circuits. It can be observed that the frequency range where the frequency response is distorted becomes lower with the increase in the width of the diverged interconnect and its termination capacitance, which corresponded to the input capacitance of the trigger circuit.