DocumentCode :
1465146
Title :
Parallel architectures: Cache memories for dataflow systems
Author :
Hurson, A.R. ; Kavi, Krishna M. ; Shirazi, Behrooz ; Lee, Ben
Author_Institution :
Pennsylvania State University
Volume :
4
Issue :
4
fYear :
1996
Firstpage :
50
Lastpage :
64
Abstract :
Cache memory — so effective in traditional control-flow architecture — has the potential to enhance dataflow system performance as well. The authors explore the recent trend in combining dataflow and control-flow processing, which offers new alternatives in computer architecture design, and analyze cache memory´s application to the dataflow environment.
Keywords :
Associative memory; Book reviews; Content management; FETs; Knowledge management; Microcomputers; Multiprocessor interconnection networks; Parallel processing; Rivers; Technology management;
fLanguage :
English
Journal_Title :
Parallel & Distributed Technology: Systems & Applications, IEEE
Publisher :
ieee
ISSN :
1063-6552
Type :
jour
DOI :
10.1109/M-PDT.1996.544441
Filename :
544441
Link To Document :
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