DocumentCode :
1465178
Title :
Coupling effects on wire delay. Challenges in deep submicron VLSI design
Author :
Zhang, Xiaonan
Author_Institution :
Metaflow Technol. Inc., La Jolla, CA, USA
Volume :
12
Issue :
6
fYear :
1996
fDate :
11/1/1996 12:00:00 AM
Firstpage :
12
Lastpage :
18
Abstract :
Coupling is a complex phenomenon, especially where the high-gain coupling effect is concerned. To introduce coupling effects on wire delay, including the high-gain coupling effect, this article presents a generalization of a study that evolved from a real VLSI design. Possible solutions to coupling effects such as CAD tools, circuit design methodology, and circuit design techniques are also discussed. The conclusions and results presented in this article are based on current complementary metal oxide semiconductor (CMOS) technologies
Keywords :
CMOS integrated circuits; VLSI; circuit CAD; delays; integrated circuit design; CAD; CMOS technology; circuit design; coupling; deep submicron VLSI design; wire delay; CMOS technology; Capacitance; Circuit simulation; Circuit synthesis; Coupling circuits; Delay effects; Integrated circuit interconnections; Switches; Very large scale integration; Wire;
fLanguage :
English
Journal_Title :
Circuits and Devices Magazine, IEEE
Publisher :
ieee
ISSN :
8755-3996
Type :
jour
DOI :
10.1109/101.544446
Filename :
544446
Link To Document :
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