DocumentCode
1465241
Title
Improved three-step de-embedding method to accurately account for the influence of pad parasitics in silicon on-wafer RF test-structures
Author
Vandamme, Ewout P. ; Schreurs, Dominique M M P ; Van Dinther, Cees
Author_Institution
IMEC, Leuven, Belgium
Volume
48
Issue
4
fYear
2001
fDate
4/1/2001 12:00:00 AM
Firstpage
737
Lastpage
742
Abstract
In order to model the RF behavior of a device-under-test (DUT), e.g., active and passive devices, dedicated on-wafer test-structures are required. However, parasitic components in the test-structure stemming from the contact pads, the metal interconnections and the silicon substrate, largely influence the RF behavior of the actual DUT. They need to be subtracted from the measurement results if one wants to model the RF behavior of the actual DUT accurately. This subtraction procedure is referred to as de-embedding. In this paper, we propose an improved three-step de-embedding method to subtract the influence of parasitics. The de-embedding method has been applied not only to S-parameter measurement results on MOSFETs but also, for the first time, to large-signal vectorial RF measurements
Keywords
MOSFET; S-parameters; elemental semiconductors; semiconductor device measurement; semiconductor device models; semiconductor device testing; silicon; MOSFET; S-parameter measurement; Si; active device; contact pad parasitics; device-under-test; large-signal vectorial RF measurement; metal interconnection; on-wafer test structure; passive device; silicon substrate; three-step de-embedding method; Atherosclerosis; Integrated circuit interconnections; MOSFETs; Microwave measurements; Radio frequency; Semiconductor device measurement; Silicon; Substrates; Testing; Time measurement;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.915712
Filename
915712
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