Title :
Power-oriented partial-scan design approach
Author :
Jou, J.-Y. ; Nien, M.-C.
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
8/1/1998 12:00:00 AM
Abstract :
Power consumption and testability are two of the major considerations in modern VLSI design. A full-scan method had been used widely in the past, to improve the testability of sequential circuits. Owing to the lower overheads incurred, the partial-scan design has gradually become popular. The authors propose a partial-scan selection strategy which is based on the structural analysis approach and considers the area and power overheads simultaneously. A powerful sample-and-search algorithm is used to find the solution that minimises the user-specified cost function in terms of power and area overheads. The experimental results show that the sample-and-search algorithm derived by the authors can effectively find the best solution of the specified cost function, for almost all circuits, and, on average, the saving of overheads for each specific cost function is significant
Keywords :
VLSI; automatic testing; boundary scan testing; design for testability; integrated circuit design; integrated circuit testing; logic testing; sequential circuits; VLSI design; area overheads; power consumption; power-oriented partial-scan design; sample-and-search algorithm; sequential circuits; specified cost function; structural analysis approach; testability; user-specified cost function;
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
DOI :
10.1049/ip-cds:19981920