DocumentCode
1465769
Title
Request resubmission in a blocking, circuit-switched, interconnection network
Author
Dierrich, P. ; Rao, Ramesh R.
Author_Institution
California Univ., San Diego, La Jolla, CA, USA
Volume
45
Issue
11
fYear
1996
fDate
11/1/1996 12:00:00 AM
Firstpage
1282
Lastpage
1293
Abstract
In this paper, we study the delay performance of a circuit switched, self-routing Delta network. A gated hold protocol that retains partial path information is used to guarantee service of all requests. A novel technique that involves the construction of an easier to analyze dominant system is presented. A recursive expression for the probability mass function of the cycle time in the dominant system is derived. Comparison of the dominant system analysis with simulation of the actual system shows that the dominant system accurately predicts performance for low network loads. As network loads increase, the dominant system becomes worse at predicting behavior of the actual system. These results also help develop insight into how to trade off higher delay variability for increased throughput
Keywords
circuit switching; multiprocessor interconnection networks; performance evaluation; protocols; circuit-switched interconnection network; delay performance; dominant system analysis; gated hold protocol; higher delay variability; partial path information; probability mass function; recursive expression; request resubmission; self-routing Delta network; simulation; Analytical models; Delay; Intelligent networks; Multiprocessor interconnection networks; Parallel processing; Performance analysis; Protocols; Switching circuits; System performance; Telecommunication traffic;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.544484
Filename
544484
Link To Document