Title :
Low-voltage CMOS pulsewidth control loop using push-pull charge pump
Author :
Wang, J.S. ; Yang, P.H.
Author_Institution :
Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
fDate :
3/29/2001 12:00:00 AM
Abstract :
The push-pull charge pump circuit has found new applications in pulsewidth control loops (PWCLs) for clock buffers. With this charge pump, the supply voltage of the PWCL can be reduced to at least 1.8 V when a 0.35 μm CMOS process is used for a 600 MHz incoming clock signal
Keywords :
CMOS integrated circuits; application specific integrated circuits; high-speed integrated circuits; integrated circuit design; low-power electronics; 0.35 micron; 1.8 V; 600 MHz; CMOS process; clock buffers; incoming clock signal; low-voltage CMOS; pulsewidth control loops; push-pull charge pump circuit; supply voltage;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20010278
