DocumentCode
146640
Title
Design and Performance Evaluation of a Manycore Processor for Large FPGA
Author
Mori, Hisamichi ; Kise, Kenji
Author_Institution
Dept. of Comput. Sci., Tokyo Inst. of Technol., Tokyo, Japan
fYear
2014
fDate
23-25 Sept. 2014
Firstpage
207
Lastpage
214
Abstract
Due to the limitations of the single-threaded performance and the improvement of semiconductor technology, manycore processors having a large number of processor cores on a single chip are becoming mainstream. Various manycore processors have been developed to date, but there are still a few simple manycore processors capable to run on a large FPGA. Considering the above background, we designed and implemented a simple manycore processor in hardware description language targeting a large FPGA. We implemented the designed manycore processor on the Xilinx Virtex-7 and evaluated the amount of used hardware resources. We verified that the designed manycore processor runs correctly. We evaluated architectural performance of the designed manycore processor by executing a parallel application program which solves the N-Queens problem.
Keywords
field programmable gate arrays; integrated circuit design; multiprocessing systems; performance evaluation; N-Queens problem; Xilinx Virtex-7; hardware description language; large FPGA; manycore processor design; parallel application program; performance evaluation; processor cores; semiconductor technology; single-threaded performance; Biological cells; Circuit faults; Combinational circuits; Fault detection; Genetic algorithms; Integrated circuit modeling; Very large scale integration; FPGA; MIPS; Manycore; Network on Chip; Verilog HDL;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Multicore/Manycore SoCs (MCSoc), 2014 IEEE 8th International Symposium on
Conference_Location
Aizu-Wakamatsu
Type
conf
DOI
10.1109/MCSoC.2014.37
Filename
6949473
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