• DocumentCode
    1466493
  • Title

    Fast, minimal decoding complexity, systematic (13, 8) single-error-correcting codes for on-chip DRAM applications

  • Author

    Kazéminéjad, A.

  • Author_Institution
    Inst. d´´Electron. Fondamentale, Univ. de Paris-Sud, Orsay, France
  • Volume
    37
  • Issue
    7
  • fYear
    2001
  • fDate
    3/29/2001 12:00:00 AM
  • Firstpage
    438
  • Lastpage
    440
  • Abstract
    Fast, minimal decoding complexity (13,8) binary systematic single-error-correcting codes are proposed for on-chip DRAM applications. These (13,8) codes allow fast single error correcting with one extra parity bit penalty and can be used in combinational circuits with minimal (ultimate) decoding complexity
  • Keywords
    DRAM chips; circuit complexity; combinational circuits; decoding; error correction codes; combinational circuits; fast single error correction; minimal decoding complexity; onchip DRAM applications; single-error-correcting codes; systematic (13, 8) single ECCs;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20010316
  • Filename
    917479
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1466493