Title :
Extremely low-noise performance of GaAs MESFETs with wide-head T-shaped gate
Author :
Onodera, Kiyomitsu ; Nishimura, Kazumi ; Aoyama, Shinji ; Sugitani, Suehiro ; Yamane, Yasuro ; Hirano, Makoto
Author_Institution :
NTT Opt. Network Syst. Lab., Kanagawa, Japan
fDate :
2/1/1999 12:00:00 AM
Abstract :
Fully ion-implanted low-noise GaAs MESFETs with a 0.11-μm Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeter-wave integrated circuits (MMICs). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (Lh) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold´s method. A current gain cutoff frequency (fT) and a maximum stable gain (MSG) decrease monotonously as Lh increases on account of parasitic capacitance. However, the device with Lh of 1.0 μm, which has lower gate resistance than 1.0 Ω, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMT´s
Keywords :
III-V semiconductors; Schottky gate field effect transistors; gallium arsenide; microwave field effect transistors; semiconductor device metallisation; semiconductor device noise; 0.11 micron; 0.78 dB; 26 GHz; 8.7 dB; Au-WSiN; Au/WSiN T-shaped gate; GaAs; GaAs MESFET; MMIC; cold FET; current gain cutoff frequency; fabrication; gate resistance; interconnect; ion implantation; maximum stable gain; noise figure; parasitic capacitance; FETs; Gallium arsenide; Gold; Integrated circuit interconnections; MESFETs; MMICs; Microwave devices; Millimeter wave integrated circuits; Noise figure; Parasitic capacitance;
Journal_Title :
Electron Devices, IEEE Transactions on