Title :
A 10 Gb/s 45 mW Adaptive 60 GHz Baseband in 65 nm CMOS
Author :
Thakkar, Chintan ; Kong, Lingkai ; Jung, Kwangmo ; Frappé, Antoine ; Alon, Elad
Author_Institution :
Univ. of California at Berkeley, Berkeley, CA, USA
fDate :
4/1/2012 12:00:00 AM
Abstract :
This paper presents a low-power mixed-signal adaptive 60 GHz baseband in 65 nm CMOS. The design integrates variable gain amplifiers, analog phase rotator, 40-coefficient I/Q decision feedback equalizers (DFEs), clock generation and data recovery circuits, and adaptation hardware. The baseband achieves 10 Gb/s operation with BER <; 10-12 while consuming 53 mW (adaptation on)/45 mW (adaptation off), of which the core signal processing circuits consume only 29 mW.
Keywords :
CMOS integrated circuits; amplifiers; decision feedback equalisers; error statistics; mixed analogue-digital integrated circuits; signal processing; synchronisation; BER; I-Q decision feedback equalizers; adaptation hardware; analog phase rotator; bit rate 10 Gbit/s; clock generation; core signal processing circuits; data recovery circuits; low-power mixed-signal adaptive baseband; power 45 mW; size 65 nm; variable gain amplifiers; Bandwidth; Baseband; CMOS integrated circuits; Decision feedback equalizers; Loading; OFDM; 60 GHz; Carrier recovery; clock & data recovery (CDR); decision feedback equalizer (DFE); mixed-signal; phase rotator; sign-sign LMS; variable gain amplifier (VGA);
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2012.2184651
