Substrate current reduction techniques for BiCMOS DRAM

Substrate current (I_BB) reduction techniques useful to BiCMOS DRAM´s are proposed through a comparison of the I_BB characteristics for a BiCMOS driver and a CMOS driver and through a clarification of the I_BB generation mechanism. Four key results are obtained. One is that the I_BB of conventional BiCMOS drivers is unacceptably high, i.e, three times larger than that of CMOS drivers. Another is that the excessive I_BB of BiCMOS drivers is generated by the saturation of bipolar transistors, which results from a collector voltage decrease caused by large amounts of collector current flowing through the collector saturation resistance r_cs. The third result concerns proposals for I_BB reduction techniques. One features two collector outputs terminals for avoiding the r_cs effect and the other features application of a low supply voltage for the base. The last result is that BiCMOS drivers using the I_BB reduction techniques make it possible to achieve 1-Mbit BiCMOS DRAM´S with I_BB levels comparable to those of conventional CMOS DRAM´s.