Title :
Design of fault diagnosable and repairable PLA´s
Author :
Chang, Tsin-Yuan ; Wey, Chin-Long
Author_Institution :
Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA
fDate :
10/1/1989 12:00:00 AM
Abstract :
Presents a complete fault-tolerant programmable logic array (PLA) design that includes both fault diagnosability and repairability. The proposed PLA design is capable of detecting, locating, and repairing single and multiple stuck-at, bridging, and crosspoint faults. The results of this study show that the total augmented area overhead for both repair and fault diagnosis is nearly 15 to 25 percent over the original PLA, but the chip yield can be improved significantly.
Keywords :
MOS integrated circuits; logic arrays; PLA design; bridging faults; chip yield; crosspoint faults; fault diagnosability; fault diagnosable; fault diagnosis; fault-tolerant programmable logic array; multiple faults; repairability; repairable PLAs; single faults; stuck-at faults; total augmented area overhead; Circuit faults; Circuit testing; Fault detection; Fault diagnosis; Fault location; Fault tolerance; Logic design; Programmable logic arrays; Shift registers; Space technology;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1989.572632
