VHDL implementation of spatial filter for image enhancement

Author

Padmasana, Panchami ; Mohanty, Mihir Narayan ; Sahu, Hemanta Kumar

Author_Institution

Dept. of Electron. & Telecommun. Eng., Koustuv Inst. of Self Domain, Bhubaneswar, India

fYear

2014

fDate

3-5 April 2014

Firstpage

195

Lastpage

199

Abstract

Image processing applications in various field gain more and more day by day. Image enhancement is highly essential in many image processing techniques and applications. It has many applications in areas like communication engineering, medical image processing, RADAR image processing, and social security. In this paper, we have studied different spatial domain techniques for enhancement of image, both direct and indirect. For removing of noise and artifacts from the image, we have found the median filter is one of the best methods for enhancement. In first phase it has been designed and verified using MATLAB simulation. Next to it FPGA implementation is performed using VHDL and tested in SPARTAN - 3 hardware circuit board.

Keywords

field programmable gate arrays; hardware description languages; image denoising; image enhancement; spatial filters; FPGA implementation; Matlab; SPARTAN -3 hardware circuit board; VHDL implementation; artifacts removal; image enhancement; noise removal; spatial domain technique; spatial filter; Field programmable gate arrays; Least squares approximations; Manganese; Radio access networks; Registers; Histogram Equalization; Image Enhancement; Impulse Noise; Median Filter; Spatial Filtering;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications and Signal Processing (ICCSP), 2014 International Conference on

Conference_Location

Melmaruvathur

Print_ISBN

978-1-4799-3357-0

Type

conf

DOI

10.1109/ICCSP.2014.6949827

Filename

6949827