• DocumentCode
    1468278
  • Title

    Power7: IBM´s Next-Generation Server Processor

  • Author

    Kalla, Ron ; Sinharoy, Balaram ; Starke, William J. ; Floyd, Michael

  • Volume
    30
  • Issue
    2
  • fYear
    2010
  • Firstpage
    7
  • Lastpage
    15
  • Abstract
    The Power7 is IBM´s first eight-core processor, with each core capable of four-way simultaneous-multithreading operation. Its key architectural features include an advanced memory hierarchy with three levels of on-chip cache; embedded-DRAM devices used in the highest level of the cache; and a new memory interface. This balanced multicore design scales from 1 to 32 sockets in commercial and scientific environments.
  • Keywords
    DRAM chips; cache storage; embedded systems; microprocessor chips; multi-threading; multiprocessing systems; balanced multicore design; eight-core processor; embedded-DRAM devices; memory interface; on-chip cache; power 7-IBM next-generation server processor; simultaneous-multithreading operation; Bandwidth; Buildings; Control systems; Multithreading; Packaging; Scalability; Sockets; Surface-mount technology; Throughput; Yarn; DDR3; IBM; Power7; PowerPC architecture; RAS; SMT operation; eDRAM; processor;
  • fLanguage
    English
  • Journal_Title
    Micro, IEEE
  • Publisher
    ieee
  • ISSN
    0272-1732
  • Type

    jour

  • DOI
    10.1109/MM.2010.38
  • Filename
    5446247
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1468278