DocumentCode
1468510
Title
Simulation Study of Dominant Statistical Variability Sources in 32-nm High- 
/Metal Gate CMOS
Author
Wang, Xingsheng ; Roy, Gareth ; Saxod, Olivier ; Bajolet, Aurélie ; Juge, André ; Asenov, Asen
Author_Institution
Device Modelling Group, Univ. of Glasgow, Glasgow, UK
Volume
33
Issue
5
fYear
2012
fDate
5/1/2012 12:00:00 AM
Firstpage
643
Lastpage
645
Abstract
Comprehensive 3-D simulations have been carried out and compared with experimental data highlighting the dominant sources of statistical variability in 32-nm high-κ/metal gate MOSFET technology. The statistical variability sources include random discrete dopants, line edge roughness, and metal gate granularity. Their relative importance is highlighted in the numerical simulations. Excellent agreement is achieved between the simulated and measured standard deviation of the threshold voltage.
Keywords
CMOS integrated circuits; MOSFET; high-k dielectric thin films; random processes; statistical analysis; comprehensive 3D simulations; data highlighting; dominant statistical variability sources; high-κ/metal gate CMOS; high-κ/metal gate MOSFET technology; line edge roughness; measured standard deviation; metal gate granularity; numerical simulations; random discrete dopants; relative importance; simulated standard deviation; simulation study; size 32 nm; threshold voltage; Logic gates; MOSFET circuits; Metals; Semiconductor device modeling; Semiconductor process modeling; Threshold voltage; Transistors; Fluctuation; MOSFET; line edge roughness (LER); measurement; metal gate; sensitivity; simulation; threshold voltage; variability;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2012.2188268
Filename
6168792
Link To Document