DocumentCode :
1469079
Title :
Combinational logic approach for implementing an improved approximate squaring function
Author :
Hiasat, Ahmad A. ; Abdel-Aty-Zohdy, Hoda S.
Author_Institution :
Dept. of Electron. Eng., Princess Sumaya Univ., Amman, Jordan
Volume :
34
Issue :
2
fYear :
1999
fDate :
2/1/1999 12:00:00 AM
Firstpage :
236
Lastpage :
240
Abstract :
The Viterbi algorithm is a fundamental signal-processing technique used in different communication systems. An improved, implemented, and tested approximate squaring function for the Viterbi algorithm is introduced in this paper. The implementation of this improved squaring function is based on combinational logic design. The performance of this new approach has been verified by implementing a 7-bit squaring function chip in a 2-μm CMOS technology. The active integrated circuit area of the chip was 380×400 μm2, and the delays through this area were 5.7 and 3.0 ns for rising and falling edges, respectively. Compared with a previous design, this approach reduces error associated with approximation, simplifies the complexity of realization, reduces the integrated circuit area by at least 40%, and increases the speed by about 100%
Keywords :
CMOS logic circuits; VLSI; Viterbi decoding; combinational circuits; integrated circuit design; logic design; 2 micron; 7 bit; CMOS technology; Viterbi algorithm; approximate squaring function; combinational logic design; integrated circuit; signal-processing technique; CMOS technology; Concatenated codes; Convolutional codes; Delay; Integrated circuit technology; Logic design; Maximum likelihood decoding; Testing; Very large scale integration; Viterbi algorithm;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.743786
Filename :
743786
Link To Document :
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