Title :
Precision tunable RTL macro-modelling cycle-accurate power estimation
Author :
Schafer, Benjamin Carrion ; Wakabayashi, Kazutoshi
Author_Institution :
Syst. IP Core Lab., NEC Corp., Kawasaki, Japan
fDate :
3/1/2011 12:00:00 AM
Abstract :
This study presents a precision tunable cycle-accurate register transfer level (RTL) power estimation method based on a hybrid lookup table (LUT) and linear regression model. The authors´ method pre-characterises the power profile for a set of atomic units (i.e. adder, multipliers, multiplexers) into an RTL library. This library consists of two parts: (1) an LUT to capture the non-linear behaviour of the atomic unit and (2) a linear regression equation for its regular activity. These non-linearities are treated as outliers of the linear regression and therefore removed from the linear regression data set into the LUT. Based on the precision requirements (quality of the estimation) their method stores more or less discrete values in the LUT library part. This method has been integrated into a high level synthesis (HLS) tool that generates specific RTL for power estimation where each atomic unit is instantiated with a shadow components that outputs its power consumption based on its inputs´ activity. Experimental results for different precision requirements (outliers 3´, 2´ and 1´ from the linear regression equation) show an improvement of the RMSE by 78, 82 and 90´ and a maximum error reduction of 30, 34 and 54´, respectively, at the expense of having to store 0.69, 4.05 and 15.09´ of all the training set combination, respectively, in the LUT power library compared to the pure linear regression method.
Keywords :
high level synthesis; logic gates; power aware computing; precision engineering; regression analysis; table lookup; LUT power library; RMSE; RTL library; SystemC; atomic unit; high level synthesis tool; hybrid lookup table; linear regression model; power consumption; precision tunable RTL macro-modelling cycle-accurate power estimation;
Journal_Title :
Computers & Digital Techniques, IET
DOI :
10.1049/iet-cdt.2010.0044