A Vertically Integrated Pixel Readout Device for the Vertex Detector at the International Linear Collider

Author

Deptuch, Grzegorz ; Christian, David ; Hoff, James ; Lipton, Ronald ; Shenai, Alpana ; Trimpl, Marcel ; Yarema, Raymond ; Zimmerman, Tom

Author_Institution

Dept. of Particle Phys. Div., Fermi Nat. Accel. Lab., Batavia, IL, USA

Volume

57

Issue

2

fYear

2010

fDate

4/1/2010 12:00:00 AM

Firstpage

880

Lastpage

890

Abstract

Tracking and vertexing in future High-Energy Physics (HEP) experiments involves construction of detectors composed of up to a few billions of channels. Readout electronics must record the position and time of each measurement with the highest achievable precision. This paper reviews a prototype of the first 3D readout chip for HEP, designed for a vertex detector at the International Linear Collider. The prototype features 20 Ã— 20 Â¿m² pixels, laid out in an array of 64 Ã— 64 elements and was fabricated in a 3-tier 0.18 Â¿m Fully Depleted SOI CMOS process at MIT-Lincoln Laboratory. The tests showed correct functional operation of the structure. The chip performs a zero-suppressed readout.

Keywords

CMOS integrated circuits; linear accelerators; position sensitive particle detectors; readout electronics; silicon-on-insulator; 3D readout chip; International Linear Collider; MIT-Lincoln Laboratory; fully depleted SOI CMOS process; high-energy physics experiments; readout electronics; tracking; vertex detector; vertexing; vertically integrated pixel readout device; CMOS process; Detectors; Laboratories; Physics; Position measurement; Prototypes; Readout electronics; Semiconductor device measurement; Testing; Time measurement; 3D-IC; CMOS; FDSOI; SOI; TSV; pixel detector; sparsified readout;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2010.2042301

Filename

5446496