DocumentCode
1469834
Title
High power added efficiency at 35 GHz on InP DH HEMTs
Author
Gaquiere, C. ; Bourcier, E. ; Piotrowicz, S. ; Crosnier, Y.
Author_Institution
Lille I Univ., Villeneuve d´´Ascq, France
Volume
34
Issue
25
fYear
1998
fDate
12/10/1998 12:00:00 AM
Firstpage
2438
Lastpage
2439
Abstract
A δ doped AlInAs/GaInAs on InP high electron mobility transistors (HEMTs) has been realised with an AlAs/AlInAs superlattice barrier layer and a gate length of 0.25 μm. A very high breakdown voltage of 10 V when the device is operated as a transistor has been demonstrated. Power measurements, performed at 35 GHz with an active load pull bench, have shown that a state of the art power added efficiency of 43.2% has been obtained with an associated power gain of 6.2 dB and an output power density of 200 mW/mm. The device was biased near to class B operation
Keywords
III-V semiconductors; indium compounds; millimetre wave field effect transistors; millimetre wave power transistors; power HEMT; semiconductor device breakdown; δ doped AlInAs/GaInAs; 0.25 micron; 10 V; 35 GHz; 43.2 percent; 6.2 dB; AlAs-AlInAs; AlAs/AlInAs superlattice barrier layer; AlInAs-GaInAs; InP; InP DH HEMT; active load pull; breakdown voltage; class B operation; high electron mobility transistor; output power density; power added efficiency; power gain;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19981667
Filename
744036
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