DocumentCode :
146999
Title :
FPGA implementation of content addressable memory based information detection system
Author :
Soni, M.M. ; Dakhole, P.K.
Author_Institution :
Dept. Electron. Eng., Rashtrasant Tukadoji Maharaj Nagpur Univ., Nagpur, India
fYear :
2014
fDate :
3-5 April 2014
Firstpage :
930
Lastpage :
933
Abstract :
CAM (content-addressable memory) is a specialized type of high-speed memory that searches its entire contents in a single clock cycle. We are designing generalized CAM using Dual Port RAM (random access memory) structure which will perform match operation in addition to read and write operation .The design has fast search capabilities while consuming least system resources as possible. CAM provides performance advantage over other search algorithms as searching is based on content rather than address unlike RAM. The match time of our CAM structure is faster and resources are more effective. CAM is used in application where search time is very critical. content addressable memory compare input search data against stored data and return address of matched data. Thus overall function of CAM is to take search word and return matching memory location.
Keywords :
content-addressable storage; field programmable gate arrays; random-access storage; FPGA implementation; content addressable memory based information detection system; dual port RAM; dual port random access memory; high-speed memory; match operation; matching memory location; read operation; write operation; Algorithm design and analysis; Clocks; Computer aided manufacturing; Impedance matching; Memory management; Random access memory; Routing; CAM (content-addressable memory); Dual Port; RAM (random access memory); match;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications and Signal Processing (ICCSP), 2014 International Conference on
Conference_Location :
Melmaruvathur
Print_ISBN :
978-1-4799-3357-0
Type :
conf
DOI :
10.1109/ICCSP.2014.6949980
Filename :
6949980
Link To Document :
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