DocumentCode :
1470254
Title :
The iflow address processor
Author :
O´Connor, Mike ; Gomez, Christopher A.
Author_Institution :
Silicon Access Networks, San Jose, CA, USA
Volume :
21
Issue :
2
fYear :
2001
Firstpage :
16
Lastpage :
23
Abstract :
The IAP takes advantage of fast, wide embedded DRAM to perform fast forwarding-table lookups and statistics collection for the next generation of fast, intelligent routers. Its lookup rate of 65.5 million lookups per second allows two lookups per packet at 10 gigabits per second into a 256 K entry table
Keywords :
Internet; table lookup; telecommunication network routing; transport protocols; fast forwarding; iflow address processor; intelligent routers; statistics collection; table lookups; Bandwidth; IP networks; Intelligent networks; Next generation networking; Quality of service; Random access memory; Silicon; Spine; Statistics; Web and internet services;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.917999
Filename :
917999
Link To Document :
بازگشت