Design and characterization of an error-correcting code for the SONET STS-1 tributary

The authors have designed and characterized a single-error-correcting (SEC), double-error-detecting (DED) code applicable to the STS-1 SONET format. They show that if two of the presently unallocated bytes in the path overhead field of STS-1 are assigned for error-correction coding (ECC), a {6208, 6195} shortened extended Hamming code can be implemented using as few as 660 gates plus a 1-kbyte RAM IC, achieving (O8.6×10^-3 P ₂²) BER reduction with 139 μs of signal delay. The authors explain how the existing BIP-8 error-monitoring byte of the STS-1 format could be integrated with the proposed ECC so that a net allocation of only one new STS-1 overhead byte is required for both error monitoring and error correction. The implementation method is such that all path, line, and section overhead functions in SONET can be performed at intermediate sites without requiring ECC decoding. The authors consider application alternatives and describe the forward-error-correction (FEC) circuit design and trial results. System issues are covered, including network delay, effects of error extension on BER, addition of double-error detection, performance monitoring, and options for intelligent network control and management of FEC functions. Codes related to their path-level design that are applicable to a number of other strategies for applying FEC in SONET are presented