DocumentCode :
1470480
Title :
Improving a nonenumerative method to estimate path delay fault coverage
Author :
Heragu, Keerthi ; Agrawal, Vishwani D. ; Bushnell, Michael L. ; Patel, Janak H.
Author_Institution :
Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
Volume :
16
Issue :
7
fYear :
1997
fDate :
7/1/1997 12:00:00 AM
Firstpage :
759
Lastpage :
762
Abstract :
A recently proposed method obtains path delay fault coverages by estimating the count of the number of tested faults instead of actually enumerating them. The estimate becomes pessimistic when several paths share a set of lines. In this communication, we present a continuum of improved approximations for the counting method, approaching exact fault simulation, to allow tradeoffs between accuracy and complexity. Higher accuracy is obtained at the expense of CPU time. We propose the use of flags corresponding to fixed-length path segments. A flag indicates whether or not the segment has been included in a previously detected path fault. A path fault, detected by a pair of vectors, is counted as a new detection only if it includes at least one segment not included in any previously tested path fault. The results show that as the length of segments is increased, the accuracy becomes close to that of the exact fault simulation, even with small segment lengths
Keywords :
circuit testing; delays; fault diagnosis; CPU time; counting method; fault simulation; flag; nonenumerative method; path delay fault coverage; segment length; Circuit faults; Circuit simulation; Circuit testing; Delay estimation; Electrical fault detection; Fault detection; Logic;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.644037
Filename :
644037
Link To Document :
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