DocumentCode :
1470543
Title :
The inversion algorithm for digital simulation
Author :
Maurer, Peter M.
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
Volume :
16
Issue :
7
fYear :
1997
fDate :
7/1/1997 12:00:00 AM
Firstpage :
762
Lastpage :
769
Abstract :
The inversion algorithm is an event-driven algorithm, whose performance rivals or exceeds that of levelized compiled code simulation, even at activity rates of 50% or more. The inversion algorithm has several unique features, the most remarkable of which is the size of the run-time code. The basic algorithm can be implemented using no more than a page of run-time code, although in practice, it is more efficient to provide several different variations of the basic algorithm. The run-time code is independent of the circuit under test, so the algorithm can be implemented either as a compiled code or an interpreted simulator with little variation in performance. Because of the small size of the run-time code, the run-time portions of the inversion algorithm can be implemented in assembly language for peak efficiency, and still can be retargeted for new platforms with little effort
Keywords :
circuit analysis computing; discrete event simulation; inverse problems; logic CAD; logic design; circuit under test; digital simulation; event-driven algorithm; interpreted simulator; inversion algorithm; levelized compiled code simulation; logic simulation; run-time code; Assembly; Circuit simulation; Circuit testing; Computational modeling; Costs; Digital simulation; Discrete event simulation; Logic; Runtime; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.644038
Filename :
644038
Link To Document :
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