Three-dimensional capacitance evaluation on a Connection Machine

Author

Guerrieri, Roberto ; Sangiovanni-Vincentelli, Alberto

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

Volume

7

Issue

11

fYear

1988

fDate

11/1/1988 12:00:00 AM

Firstpage

1125

Lastpage

1133

Abstract

An algorithm for three-dimensional capacitance evaluation suitable for parallel computers is proposed, and its implementation on a massively parallel architecture, the Connection Machine, is described. After a brief overview of the architecture and the programming style of the Connection Machine is given, a mathematical formulation of the general problem (i.e. the numerical solution of Laplace´s equation in three dimensions) is reviewed. The numerical discretization scheme is described along with its implementation on a Connection Machine and the numerical performances of a set of examples are discussed. Experimental results show that this approach allows a fast and efficient solution for this type of problem

Keywords

VLSI; capacitance; circuit analysis computing; parallel algorithms; CAD; Connection Machine; Laplace´s equation; VLSI; circuit simulation; interconnection modelling; massively parallel architecture; numerical discretization scheme; numerical solution; parallel computers; parasitic extraction; programming; three-dimensional capacitance evaluation; Circuit analysis; Circuit simulation; Computational efficiency; Computational modeling; Computer architecture; Concurrent computing; Equations; Parasitic capacitance; Predictive models; Wires;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.9183

Filename

9183