• DocumentCode
    1472275
  • Title

    Fast and realistic worst case analysis of CMOS integrated circuits

  • Author

    Matarrese, G. ; Marzocca, C. ; Corsi, F.

  • Author_Institution
    Dipartimento di Electtrotecnia ed Elettronica, Politecnico di Bari, Italy
  • Volume
    37
  • Issue
    6
  • fYear
    2001
  • fDate
    3/15/2001 12:00:00 AM
  • Firstpage
    350
  • Lastpage
    351
  • Abstract
    A new technique for a simple and realistic worst case analysis of CMOS circuit structures is presented. This methodology preserves correlation between model parameters and provides results similar to those produced by extensive Monte Carlo simulations, comparing favourably to other traditional worst case techniques in terms of result accuracy and computational effort required
  • Keywords
    CMOS integrated circuits; integrated circuit modelling; low-power electronics; principal component analysis; CMOS integrated circuits; circuit structures; computational effort; model parameters; result accuracy; worst case analysis;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20010254
  • Filename
    918330
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1472275