• DocumentCode
    1472998
  • Title

    Bit-serial modular multiplier

  • Author

    Tomlinson, A.

  • Author_Institution
    Dept of Electr. Eng., Edinburgh Univ., UK
  • Volume
    25
  • Issue
    24
  • fYear
    1989
  • Firstpage
    1664
  • Abstract
    A bit-serial modular multiplier is presented which uses a table look-up method to perform modular reduction. Since the clock frequency is independent of word length this design is most useful when dealing with large integers, and is required by many modern cryptographic systems.
  • Keywords
    application specific integrated circuits; cryptography; digital arithmetic; digital integrated circuits; multiplying circuits; bit-serial modular multiplier; clock frequency; cryptographic systems; large integers; modular reduction; table look-up method; word length;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19891115
  • Filename
    91854
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1472998