• DocumentCode
    1473032
  • Title

    DRAMSim2: A Cycle Accurate Memory System Simulator

  • Author

    Rosenfeld, Paul ; Cooper-Balis, Elliott ; Jacob, Bruce

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Maryland, College Park, MD, USA
  • Volume
    10
  • Issue
    1
  • fYear
    2011
  • Firstpage
    16
  • Lastpage
    19
  • Abstract
    In this paper we present DRAMSim2, a cycle accurate memory system simulator. The goal of DRAMSim2 is to be an accurate and publicly available DDR2/3 memory system model which can be used in both full system and trace-based simulations. We describe the process of validating DRAMSim2 timing against manufacturer Verilog models in an effort to prove the accuracy of simulation results. We outline the combination of DRAMSim2 with a cycle-accurate x86 simulator that can be used to perform full system simulations. Finally, we discuss DRAMVis, a visualization tool that can be used to graph and compare the results of DRAMSim2 simulations.
  • Keywords
    DRAM chips; memory architecture; memory cards; DDR2/3 memory system model; DRAMSim2 simulation; DRAMSim2 timing; Verilog model; cycle accurate memory system simulator; trace-based simulation; visualization tool; Computational modeling; Driver circuits; Hardware design languages; Load modeling; Object oriented modeling; Random access memory; Timing; DRAM; Primary memory; Simulation;
  • fLanguage
    English
  • Journal_Title
    Computer Architecture Letters
  • Publisher
    ieee
  • ISSN
    1556-6056
  • Type

    jour

  • DOI
    10.1109/L-CA.2011.4
  • Filename
    5732229