Reconfigurable FIR Filter using distributed arithmetic residue number system algorithm based on Thermometer Coding

Hardware implementation of FIR Filter has major applications in Analog and Digital areas. In digital signal processing FIR filters are used in separation of signals and in signal restoration purpose. The filter in the existing method is designed using multiplier technique which increases the area, delay, power and also designed using multiplier less technique by using binary input which requires much scaling. It is aimed to design a reconfigurable FIR filter which reduces area, delay also improves the speed and performance. In this method the input is converted into its residues by introducing residue number system and encoded as thermometer code which provides a simple means to perform modular inner product computation. The proposed work is designed using distributed arithmetic algorithm by introducing inner product computation method. The reconfigurable FIR filter is designed using reconfigurable look up table. The reconfigurable filter is coded using Verilog code and synthesized using Cadence Software.