DocumentCode
1473635
Title
Design of parallel counters using the map method
Author
Dean, K.J.
Volume
32
Issue
3
fYear
1966
fDate
9/1/1966 12:00:00 AM
Firstpage
159
Lastpage
162
Abstract
This paper describes how a counter may be designed to follow any desired code. The method is illustrated by the design of a parallel counter operating in the 5211 binary-coded decimal mode and which uses J-K flip-flops. The modules for the complete design are available as silicon integrated circuits. The minimized input conditions for a number of other coded decade counters are also stated.
Keywords
counting circuits;
fLanguage
English
Journal_Title
Radio and Electronic Engineer
Publisher
iet
ISSN
0033-7722
Type
jour
DOI
10.1049/ree.1966.0070
Filename
5266938
Link To Document