DocumentCode
1473909
Title
An algorithm for identifying and selecting the primed implicants of a multiple-output Boolean function
Author
Perkins, Sharon R. ; Rhyne, Tom
Author_Institution
Dept. of Comput. Sci., Houston Univ., TX, USA
Volume
7
Issue
11
fYear
1988
fDate
11/1/1988 12:00:00 AM
Firstpage
1215
Lastpage
1218
Abstract
A multiple-output Boolean minimization procedure is presented that generates a minimum cover with computational efficiency by extending the directed search algorithm to the multiple-output case. This procedure is applicable to manual execution as well as to automated execution, and to both conventional two-level gating structures and programmable logic arrays (PLAs)
Keywords
Boolean functions; logic design; minimisation of switching nets; PLAs; computational efficiency; directed search algorithm; logic design; minimization procedure; multiple-output Boolean function; programmable logic arrays; two-level gating structures; Algorithm design and analysis; Boolean functions; Computer science; Design automation; Lakes; Manuals; Merging; Microelectronics; Minimization methods; Programmable logic arrays;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.9191
Filename
9191
Link To Document